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PCB POWER INTEGRITY TOOL
PCB Via Current Calculator
Estimate plated-through-hole via current capacity, temperature rise, resistance, voltage drop, power loss, and the number of parallel vias required for a DC power transition.
Finished-hole geometry
Parallel via arrays
mm, µm, mil, °C and °F
POWER TRANSITION VIA ARRAY MODEL
APPLIED4.00 A
ARRAY4 VIAS
EST. CAPACITY5.16 A
ACTIVE MODEL IPC-2221-style screening + copper barrel resistance
PLATED BARREL SCREENING
Estimate Via Capacity, Temperature Rise and DC Loss
Use finished plated dimensions and the total current through the via array. The calculator assumes identical vias, balanced routing, and approximately equal current sharing.
VIA GEOMETRY
Finished Barrel Dimensions
mm
Use the finished hole after copper plating.
µm
Use the minimum finished barrel copper thickness.
mm
For through vias, use finished PCB thickness.
vias
Identical vias sharing the same DC transition.
LOAD AND THERMAL LIMIT
Operating Conditions
A
Total sustained DC current.
°C
Design limit above local ambient.
°C
Air or board-region temperature.
TRANSPARENT CALCULATION MODEL
How PCB Via Current Capacity Is Estimated
The calculator separates empirical current-capacity screening from geometry-based resistance and DC-loss calculations, so the result does not hide assumptions inside one unexplained rating.
Barrel Copper Area
A = π × ((D/2 + T)² − (D/2)²)Uses the exact annular copper cross-section from finished hole diameter and finished plating thickness.
Current-Capacity Screening
I = 0.024 × ΔT^0.44 × A^0.725Applies the older IPC-2221 internal-conductor correlation to one via barrel, then scales by identical parallel vias.
Estimated Temperature Rise
ΔT = (Ivia / (0.024 × A^0.725))^(1/0.44)Inverts the same correlation using applied current per via, preserving consistency between capacity and temperature-rise outputs.
Resistance and DC Loss
R = ρ(T) × L / ACalculates copper barrel resistance, parallel array resistance, voltage drop, and I²R power loss at estimated operating temperature.
Use the capacity result as a first-pass design screen
IPC-2152 shows that conductor temperature rise depends on board construction, copper planes, mounting, environment, and thermal boundaries. Via arrays also experience current-sharing and thermal-interaction effects that a browser calculator cannot fully model.
INPUT QUALITY MATTERS
Use Finished Via Dimensions, Not Nominal Drill Assumptions
The most useful result comes from fabrication data that describes the finished plated barrel. Nominal drill size, copper foil weight, and finished via plating are not interchangeable values.
| Input | Preferred Source | Why It Matters |
|---|---|---|
| Finished hole diameter | Fabricator finished-hole specification | Defines the inside diameter of the plated copper barrel. |
| Finished plating thickness | Minimum PTH copper requirement | Directly controls barrel cross-sectional area and resistance. |
| Barrel length | Finished board or layer-span thickness | Longer barrels increase resistance and DC voltage drop. |
| Parallel via count | Actual routed power transition | Capacity scales only when vias share current effectively. |
| Applied current | Rail analysis or measured worst case | Use maximum sustained DC current, not average idle current. |
EVIDENCE PRIORITY
Which value should you trust?
- Fabricator minimum: finished hole and minimum plated copper.
- Measured load: worst-case sustained rail current.
- Design estimate: datasheet or power-budget current.
PRACTICAL DESIGN RESPONSE
What to Change When a Via Array Has Limited Headroom
Use the result to identify the next geometric or layout adjustment. Each action changes a different part of the electrical and thermal path.
Add Parallel Vias
Reduces current per barrel and total array resistance when the routing feeds each via symmetrically.
Increase Barrel Copper
Greater finished plating thickness increases conducting area without requiring a larger finished hole.
Shorten the Barrel
Blind or buried transitions can reduce resistance, but they introduce fabrication cost and reliability constraints.
Improve Current Sharing
Use comparable trace entry lengths and copper access around every via instead of feeding one via first.
INCLUDED IN THIS TOOL
DC electrical screening
- Plated barrel copper area
- IPC-2221-style current estimate
- Temperature-rise estimate
- Resistance, voltage drop and I²R loss
- Ideal equal-sharing parallel array
VERIFY OUTSIDE THE TOOL
Production and reliability limits
- Actual plating distribution and voids
- Plane heat spreading and local copper
- Dense-array thermal interaction
- Pulsed, transient and high-frequency current
- Fabricator drill and aspect-ratio capability
HIGH-CURRENT PCB REVIEW
Need to validate the complete power transition?
Review the via array together with trace width, copper planes, connector limits, temperature rise, fabrication capability, and the real duty cycle.PCB VIA CURRENT FAQ
Practical Questions About Via Capacity and DC Loss
DESIGN CHECKLIST
Use the result with the real fabrication stackup
Confirm minimum finished plating, maximum sustained current, copper access around the array, and current-sharing geometry before release.Review reference platforms →How much current can a 0.3 mm PCB via carry?
Capacity depends on finished plating, temperature rise, barrel length, and surrounding copper. A 0.3 mm finished hole with 25 µm plating needs those values before estimating current.
How do I calculate current through multiple PCB vias?
Divide total current by identical parallel vias only when the layout feeds them evenly. Unequal trace access can overload the first or lowest-resistance via.
Does PCB via plating thickness affect current capacity?
Yes. Thicker finished copper increases barrel cross-sectional area, lowers resistance, reduces voltage drop, and raises the first-pass current-capacity estimate.
How is PCB via voltage drop calculated?
The calculator derives copper barrel resistance from resistivity, barrel length, and annular copper area, then applies V = I × R to the parallel via array.
Can IPC-2221 accurately predict PCB via temperature rise?
It is a useful first-pass correlation, not a complete thermal model. Planes, board construction, spacing, airflow, and neighboring heat sources can change measured rise.
Should I enter drill diameter or finished via hole diameter?
Enter finished hole diameter after plating. The barrel area calculation separately adds finished copper thickness and should not use an unplated drill diameter.